Digital or mixed signal circuits may have multiple clock domains operating on different clock frequencies. Specifically, multiple independent clocks are common in system-on-chip (SoC) design, as a majority of SoC devices have multiple interfaces use different clock frequencies. It is often required to transfer signals from one clock domain to another clock domain in these designs. To accomplish the successful signal transfer across two clock domains, designers need to instantiate synchronizing circuit and/or signal stretcher circuit based on relationships between clock frequencies of the clock domains. If signals are not synchronized across two different clock domains, the result may be metastability in design or data loss.